Retention for non-volatile memories that can be written to, such as ferroelectric memories, can fail in one of two ways. The first failure mode is that the data written to the memory is not retained when the power is removed (same state). The second failure mode is when a memory cell has a state that becomes preferred and intended data is not retained
Ferroelectric memory cells can develop a preferred state, which is generally referred to as “imprint”. The result of imprint is a reduction in switch charge at the operating voltage of the memory cell. If a cell is severely imprinted there may not be sufficient charge to change the polarization meaning that an attempt to write data to the opposite state has no effect. Referring now to FIG. 1, the effect of baking time on opposite state switch charge 102 can be seen. In general, opposite state switch charge 102 decreases linearly with respect to every factor of ten increase in baking time. Referring now to FIG. 2, it can be seen that if the polarization of the imprinted ferroelectric capacitor is switched multiple times, opposite state switch charge 202 can be recovered. FIG. 2 shows that the recovery of switch charge 202 (rejuvenation) is a function of the number of switched polarization cycles.
What is desired, therefore, is a ferroelectric memory architecture and associated method of operation with improved performance that mitigates imprint by maximizing available switch charge.